1. Field of the Invention
The present invention is directed to signal comparators. More specifically, the present invention is directed to signal comparators having hysteresis in their operation.
2. Description of the Prior Art
The use of analog signal comparators to provide a digital output signal represented by a change in level, i.e., a "zero" level and a "one" level, representative of the relative magnitudes of the compared signals is well-known in the prior art. To improve the comparator operation when the compared reference and input signal values are close in magnitude, i.e., the difference approaches zero, the prior art analog signal comparators have been operated in a so-called hysteresis mode of operation. Such a hysteresis mode of operation is well-known in the prior art, e.g., the circuit shown in U.S. Pat. No. 3,531,726. Briefly, a feedback hysteresis is developed from the output of the comparator and is fed back to the input thereof through a feedback resistor. Prior art attempts to overcome the problems occasioned by the use of such a hysteresis mode of operation have included switching the comparator out of the hysteresis mode of operation when it is desired to overcome the problems associated with hysteresis mode of operation. One of these problems arises when the compared signals are close to each other and involves the fact that the hysteresis switching occurs at a threshold voltage of the comparator rather than at the reference signal level. Thus, if the input signal is within the hysteresis loop the output of the comparator may be at an incorrect level since the hysteresis loop may maintain the comparator output level even though the input signal may actually have returned past the reference signal level. Accordingly, it is desirable to provide a comparator circuit with hysteresis having a capability for correcting the aforesaid problem associated with hysteresis comparators during a comparison of signals that are close to one another in magnitude.